R&D SW Engineer(Questa Power-Aware) - SMTS

Job Description

About the group: 
Questa Power-Aware R&D group. It is a core R&D team working on Questa low-power simulator. Charter of the team is to bring out state of the art low-power verification solution to improve over-all verification productivity. A very energetic and enthusiastic team of self-motivated individuals. 

Job-Duties: We are looking for a highly motivated software engineer to work in the Questa engineering team of the Mentor, A Siemens Business ICVS Division.
  • Development responsibilities will include core algorithmic advances and software design/architecture.
  • You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to create new engines and support existent code. 
  • Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success 
Should have 
  • Good knowledge of C/C++, algorithm and data structures 
  • Experience with UNIX and/ or LINUX platforms is necessary • Good problem solving and analytical skills 
  • The person should be self-motivated and can work independently. 
  • Should be able to guide others, towards project completion. Good to have • Knowledge of Verilog, System Verilog, VHDL. 
  • Knowledge of Unified Power Format (UPF) and low-power verification Exposure to Simulation or Formal based verification methodologies would be a plus 
  • Experience in parallel algorithms, job distribution. 

Education: B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college. Experience: 3 to 7 years 

Job ID: 115878

Organization: Digital Industries

Company: Mentor Graphics (India) Private Limited

Experience Level: Experienced Professional

Job Type: Full-time

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