Mentor Graphics, IC Verification Solutions (ICVS) Division, is seeking qualified candidate to join the S2S QA team. S2S QA team is responsible for testing all S2S solutions, targeting SoC verification from early software to system implementation.
S2S (Software-to-Systems) team is announcing the creation of a new Quality/Testing organization to focus on the qualification of Mentor new S2S platform that is targeting SoC verification from early software development to complete system implementation. S2S Solutions cover HW/SoC architecture performance analysis, SW Performance analysis, SoC Power analysis, and SoC Validation on Mentor’s HW and SW platforms.
Here is a description for the job role & responsibilities of the QA team member:
Testing the complete SW and HW platforms implementing the S2S solutions along with testing the integration with the different verification technologies (simulation, emulation, and FPGA prototyping).
Working closely with the different development and marketing teams to agree on the customer requirements, the plans for the next releases, and the applied testing methodologies.
Building and executing comprehensive test plans that guarantee high functional coverage for the features under testing, and summarizing test findings in the test summary reports.
Participation in product unit testing, regression testing, license testing, installation testing and GUI testing throughout the release life cycle.
Building test automation framework to eliminate manual testing rework and reduce testing turnaround time.
Participation in developing and maintaining build and regression infrastructure.
Understanding customer usage profile and help with the integration of customer designs in our test environments.
Product benchmarking and performance measurements iterations to capture tool performance data across releases.
Defects reporting, defects validation and defect triaging to understand the root cause of the problem and define their criticality.
Utilisation of code coverage techniques/tools to quantitatively judge product test coverage.
Assisting in the deployment and monitoring of other qualification techniques like static code analysis, dynamic code analysis and memory leakage checks.
BS, MS. in Electrical Engineering, Computer Engineering .
Strong experience in C/C++ Programming.
Experience in using Linux/Unix OS.
Good background in programming using SystemC is a plus.
Knowledge about digital design basics and SW development is required
Strong Knowledge in SystemC/UVM is a plus.
Knowledge about Hardware Description Languages (Verilog , VHDL or System Verilog) is Required.
A solid understanding of scripting languages such as Shell/Perl/Python/Make is required.
Knowledge on the quality assurance concepts and SW testing.
Knowledge of testing strategies, test planning and testing automation frameworks.
Knowledge of defect tracking systems, configuration management and code profiling tools is a plus .
Excellent Communication Skills, Self-Motivated Engineer with Good Capability for Continuous Learning.
We are a leading provider of solutions for the design, simulation and manufacture of products across many different industries. Formula 1 cars, skyscrapers, ships, space exploration vehicles, and many of the objects we see in our daily lives are being conceived and manufactured using our Product Lifecycle Management (PLM) software. Headquartered in Plano, Texas, our business works collaboratively with companies to deliver open solutions to help them make smarter decisions that result in better products.
Digital Industries Software is an equal opportunities employer and do not discriminate unlawfully on the grounds of age, disability, gender assignment, marriage and civil partnership, pregnancy and maternity, race, religion or belief, sex, sexual orientation or trade union membership.
Job ID: 120922
Organization: Digital Industries
Company: Mentor Graphics Egypt Company (A Limited Liability Company - Private Free Zone)
Experience Level: Experienced Professional
Job Type: Full-time