LVS Software Quality Engineer - SISW - MG 192480

Job Description


Layout versus schematic (LVS) is a method of verifying that the layout of an integrated circuit design is functionally equivalent to its schematic representation of the design. We are looking for a highly motivated software quality engineer with significant circuit design knowledge to join our team responsible for verification and test of Calibre LVS, ensuring our EDA software product remains the best in the industry.
You will be part of a team responsible for testing, debugging and qualifying software releases and updates. Quality assurance responsibilities will involve the design, development, and execution of functional and regression tests used to measure correctness, robustness, performance, and overall quality. You will collaborate with senior software engineers, quality assurance specialists, marketing, and customer support professionals to help deliver timely product releases that meet our customer’s needs. Through leadership and innovation, develop procedures and tools needed to improve the QA process and assist developers in design trade-offs and risk analysis assessments. You will be challenged to break away from the conventional methods of testing and to think both like an electrical engineer and a software engineer.

Minimum Qualifications:

- Technical degree in Computer Science, Electrical Engineering, Computer Engineering or related discipline. 
- 5 years in SW Quality Assurance with solid programming skills
- Extensive Linux or Unix operating system experience
- Shell Scripting experience (e.g., bash, ksh, csh)
- Familiar with using defect tracking systems
- Excellent Written and Verbal Communication Skills
- Practical experience with source code control tools (e.g., GIT, Perforce, Subversion, CVS, etc.)
- Knowledge of IC manufacturing process flows
- Extensive knowledge of the IC physical design, layout, and verification processes and tools

Preferred Qualifications:

- Exposure to CAD/CAE environments such as:
   EDA verification tools like DRC, LVS, Parasitic Extraction, and netlisting tools
o EDA full custom layout tools/place and route tools
- Experience developing or testing products written in an object oriented language
- Knowledge of the Python language
- Familiarity with the Verilog language
- Some experience writing Tcl code a plus
  Job Qualifications* (maximum 3,315 characters)


Job ID: 192480

Organization: Digital Industries

Company: Mentor Graphics Corporation

Experience Level: Experienced Professional

Job Type: Full-time

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